By Luís Miguel Pinho Pinho, Wolfgang Karl, Albert Cohen, Uwe Brinkschulte
This e-book constitutes the lawsuits of the twenty eighth foreign convention on structure of Computing platforms, ARCS 2015, held in Porto, Portugal, in March 2015.
The 19 papers awarded including 3 invited papers have been rigorously reviewed and chosen from forty five submissions. The papers are equipped in six classes protecting the themes: undefined, layout, functions, belief and privateness, real-time concerns and a most sensible papers session.
Read or Download Architecture of Computing Systems – ARCS 2015: 28th International Conference, Porto, Portugal, March 24-27, 2015, Proceedings PDF
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Additional resources for Architecture of Computing Systems – ARCS 2015: 28th International Conference, Porto, Portugal, March 24-27, 2015, Proceedings
3 SgInt (Safeguarding Interrupts) A fundamental assumption is a static system conﬁguration proving low complexity. This is prioritized over dynamic ﬂexibility to obtain a predictable and SgInt: Safeguarding Interrupts for Hardware-Based I/O Virtualization 19 deterministic system behavior. Determinism and predictability is an essential prerequisite to moderate the eﬀort for the required assurance or certiﬁcation process of a safety-oriented and security-oriented development project like in avionics .
The proposed methodology has been veriﬁed on a set of parallel benchmarks distributed with Legup . In OpenMP benchmarks each #pragma omp for has been replaced with #pragma omp simd, while pthread benchmarks have to be refactorized to replace pthread parallelism with #pragma omp simd. The proposed methodology cannot be applied to all the distributed benchmarks: some of them do not contain DoAll loops or contain DoAll loops which do not satisfy the constraints listed in Section 4. Diﬀerent degrees of parallelism have been considered: 1 (absence of parallelism), 2, 4 and 8.
A similar approach is proposed in this paper, but it is adopted during the synthesis of hardware accelerators. Finally, the eﬀects of using vector functional units in High Level Synthesis have already been evaluated in . The authors proposed the adoption of conﬁgurable vector functional units which can implement at the same time both scalar operations and vector operations. This approach produces better solutions both in terms of performances and power consumption, showing the eﬀectiveness of using parallel functional units, but it is limited to the parallelization of some operations of the speciﬁcation.